1. Field of the Invention
The present invention relates to information processing apparatuses and information processing methods, and more particularly to an information processing apparatus and an information processing method for performing information processing of three-dimensional graphics.
Recently, development of semiconductor integrated circuits for realizing a multimedia information processing apparatus is actively undertaken. In the field of multimedia, it is required that various types of data including movie data, audio data, CG data or the like be handled by a single apparatus. With the development of semiconductor integrated circuits, a single element nowadays realizes the function hitherto realized by a plurality of semiconductor integrated circuits. However, it is quite difficult to handle an extensive variety of data, or to incorporate all the necessary functions in a semiconductor integrated circuit having a limited scale.
Hence, a general practice is that a desired function is realized by writing a program for achieving a variety of combinations of basic logic operation functions that the semiconductor integrated circuit is equipped with, in accordance with a stored program control method (a method whereby a necessary logic function is realized by a generally used microprogram).
In the above described method, the logic function equal to the desired function can be realized as a whole. However, since the number of instructions combined varies, there are cases in which the process cannot be completed in a predetermined period of time. From the perspective of the uniform execution of processes, realization of process functions (algorithms) in each and every field by a set of logic functions (instruction sets) does not actually meet the requirement.
An approach to resolve this problem is to define a frequently used logic function that serves a purpose as a single instruction and an optimization is performed so that the defined function can be executed at a high speed using hardware.
Here, it is noted that, if a relatively simple process and a relative complex auxiliary process for facilitating the process are executed in combination, a high-speed execution of three-dimensional graphics processing is effectively achieved. For this purpose, it is necessary to employ a processing apparatus where the process in accordance with the stored program method and the process using hardware are combined.
2. Description of the Prior Art
FIG. 1 is a block diagram of a conventional information processing apparatus. A host computer 41 is connected to a display device 44 via a graphic processing part 42 and a frame memory 43. three-dimensional image data produced in the host computer 41 is developed into 2-D data by the graphic processing part 42, stored in the frame memory 43 and displayed in the display device 44.
The graphic processing part 42 comprises a DDA (linear interpolation process) part 42a which interpolates data on the basis of data representing vertices of a polygon and transferred from the host computer 41; a texture process part 42b for pasting a pattern to the polygon; a rendering condition determination part 42c for making a determination as to whether or the data should be used in rendering on the basis of the data function or the like; and a blender part 42d for performing a blending process where colors of adjacent pixels are blended. The process of each part is executed according to a pipeline process scheme.
The data processed by the graphic processing part 42 is developed in the frame memory 43. The display device 44 displays image that corresponds to the data developed in the frame memory 43.
Under the pipeline process scheme, the graphic processing part 42 is so constructed as to execute only a process for which it is designed. Correction of data required for the process in the graphic processing part 42 is executed in the host computer 41. For example, an auxiliary process including matching of the coordinates of the polygon to be rendered to the coordinates of the pixels on the display, is executed in the host computer 41.
In the conventional information processing apparatus, calculation of endpoints between the vertices of the polygon is executed by the host computer characterized by its flexibility in the processing, because the calculation needs a complex process including the correction of data. Therefore, the load imposed on the host computer becomes large. In addition to that, there is a problem in that changing of viewpoints cannot be performed at a high speed because the data must be read from the host computer. Hence, efficient execution of three-dimensional image process is impossible.
Accordingly, an object of the present invention is to provide a novel and useful information processing apparatus and an information processing method in which the aforementioned problems are eliminated.
Another and more specific object of the present invention is to provide an information processing apparatus and an information processing method in which the information processing can be done efficiently.
The aforementioned objects of can be achieved by an information processing apparatus which executes a process according to input information, the information processing apparatus comprising:
first information processing means for executing a process set exclusively with respect to the input information; and
second information processing means which is capable of executing a process parallel with the first information processing means, for executing a process according to process-related information with respect to the input information. According to the information processing apparatus of the present invention, while the first information processing means is executing input information processes to which it is dedicated, an auxiliary process is performed by the second information processing means in a parallel manner. Thus, it is possible to process information at a high speed.
In a preferred embodiment, the second information processing means has process-related information storing means for storing the process-related information. According to this aspect, it is possible to control the process executed by the second information processing means and information input/output of the second information processing means. Therefore, it is possible to prevent a contention for information from occurring between the first information processing means and the second information processing means. Thus, it is possible to execute information process efficiently.
In another preferred embodiment, the second information processing means has communicating means for communicating with a host system. According to this aspect, it is possible to supply information to the second information processing means from the master system irrespective of the process in the first information processing means. Therefore, the process in the second information processing means is conducted smoothly and efficiently, thus improving the speed of the process.
In another preferred embodiment, the information processing means comprises: a first operation part processing information in accordance with the process-related information; and a second operation part which processes information in accordance with the process-related information and is capable of executing a process parallel with the first operation part. According to this aspect, the first operation part processes information in accordance with the process-related information and the second operation part controls the operation of the first information processing means. In this way, the first information processing means can be controlled to execute the process in an optimal manner, thus enabling the information process to be executed efficiently.
In another preferred embodiment, the second information processing means has shared storing means accessible both from the first operation part and from the second operation part. According to this aspect, it is possible for the first and second operation parts to share information so that the first and second operation parts is able to process the information efficiently.
In still another preferred embodiment, the second information processing means sets the number of times that the first information processing means executes a process, in accordance with the process-related information, the first information processing means comprising: counting means for subtracting from a count of the counter each time a process is executed by the first information processing means; and end-of-process information generating means for ending the process of the first information processing means when the count of the counting means reached zero, and supplying end-of-process information to the second information processing means. According to this aspect, the process in the first information processing means can be automatically terminated and the processing load of the second information processing means can be reduced, thereby enabling the information process to be carried out efficiently.
In yet another preferred embodiment, the first information processing means has a three-dimensional image information processing part dedicated to processing of three-dimensional image information. According to this aspect, most of the three-dimensional image information is processed by the three-dimensional image information processing part and the auxiliary process is executed by the second information processing means. In this way, the three-dimensional image information can be processed at a high speed.
In still another preferred embodiment, the three-dimensional image information processing part of the first information processing means comprises: an interpolation calculation part executing interpolation calculations; a texture calculation part processing interpolated information processed by the interpolation calculation part, in accordance with externally supplied texture information; a rendering condition determination part determining whether or not information processed by the texture calculation part meets a predetermined rendering condition; a transparency calculation part setting a predetermined coefficient for the information determined by the rendering condition determination part to meet the predetermined rendering condition, so as to calculate a transparency; and an output part outputting information obtained by calculation of the transparency calculation part. According to this aspect, most of the three-dimensional image information process is executed by the first information processing means. By carrying out the auxiliary process by the second information processing means, the three-dimensional image process can be executed at a high speed.
In another preferred embodiment, the information processing apparatus further comprises storing means which is accessible both from the first information processing means and the second information processing means, and stores information necessary for processes in the first information processing means and the second information processing means. According to this aspect, it is possible for the first and second information processing means to share information so that parallel processing of the information can be carried out. In this way, efficient information processing is achieved.
In yet another preferred embodiment, the information storing means comprises: first information storing means for storing control information which controls processes in the first information processing means and the second information processing means, as well as storing the process-related information; second information storing means for storing predetermined information used during the processes in the first information processing means and the second processing means; and third information storing means for storing information relating to result of the processes in the first information processing means and the second information processing means. According to this aspect, it is possible to prevent contention for an access between the first and second information processing means from taking place, thereby enabling the process to be executed efficiently.
In still another preferred embodiment, the first information processing part stores all results of three-dimensional image processes executed by the first information processing means and the second information processing means, and wherein the third information storing means stores only color information and transparency information of the results of three-dimensional image processes executed by the first information processing means and the second information processing means. According to this aspect, the storage capacity of the third information storing means can be small because the third information storing means need only store color information and transparency information required for the display. Further, reading of information from the third information storing means can be performed at a high speed.
In yet another preferred embodiment, the second information processing means has execution control means for controlling, on the basis of the process-related information, the first operation part, the second operation part and the first information processing means to execute respective processes in a synchronous manner. According to this aspect, the process by the first information processing means and the process by the second information processing means can be coupled in different combinations.
In still another preferred embodiment, the execution control means comprises: a first execution control part which controls an operation of the first operation part on the basis of the process-related information and generates control information; a second execution control part which controls an operation of the second operation part on the basis of the process-related information and generates control information; a third execution control part which controls an operation of the first information processing means; and pipeline control means for controlling operations of the first through third execution control parts so that a whole operation proceeds as one pipeline operation, on the basis of the control information generated by the first and second execution control parts. According to this aspect, the processes in the first operation part, the second operation and the first information processing means can be synchronized. Therefore, complex processes can be executed efficiently. Further, the stand-by state can be controlled according to the process-related information. Thus, it is possible to adapt for various processes by modifying the process-related information.
In another preferred embodiment, when the process-related information includes stop information which causes processes to stop, the first execution control part or the second execution control part detects the stop information so as to issue an execution stop request to the pipeline control means, and wherein the pipeline control means controls operations of the first and second operation parts and the first information processing means. According to this aspect, it is easy to set a procedure for the process in the first operation part, the second operation part and the first information processing means, by setting stop information in the process-related information.
The aforementioned objects can also be achieved by an information processing method for an information processing apparatus which executes a process according to input information, the information processing apparatus including: first information processing unit for executing a process set exclusively with respect to the input information; and second information processing unit which is capable of executing a process parallel with the first information processing unit, for executing a process according to process-related information with respect to the input information, wherein
rendering information for rendering a three-dimensional image is generated in accordance with vertex information of a figure constituting a three-dimensional image,
said information processing method comprising the steps of:
a) obtaining a set of endpoints interpolated between predetermined vertices in accordance with said vertex information, using the second information processing unit;
b) rendering lines interpolated between the set of said endpoints obtained by the first information processing unit and opposite sides, using the first information processing unit; and
c) obtaining a next set of endpoints while said first information processing unit is rendering said lines, using the second information processing unit. According to the information processing method of the present invention, the relatively complex process of obtaining endpoints of a figure is executed, and the relatively simple interpolation process of interpolation process based on the endpoints is executed. In further accordance with this information processing method, it is possible to reduce the information processing load of the host system. Further, it is not necessary to wait for the supply of information from the host system. Since the endpoint process and the interpolation process can be executed parallel with each other, the information processing efficiency is improved.
The aforementioned objects of the present invention can be achieved by an information processing apparatus connectable to a texture memory storing texture data provided to paste a pattern or the like to a three-dimensional image and including color data and an xcex1 value, to a frame memory storing color data for a three-dimensional image to be displayed, and to a local memory storing rendering data including color data, an xcex1 value and a z value relating to a depth, as well as storing a microprogram and user data, the information processing apparatus comprising: texture processing means for reading the texture data from the texture memory so as to paste a pattern to associated pixels; rendering condition determination means for reading depth data or the like from the local memory so as to make a determination as to whether or not associated pixels should be rendered, blending means for reading depth data or the like for pixels that are already rendered from the local memory so as to blend read data with color data for pixels to be rendered and to obtain data that should be finally written in the frame memory, only writing of data being made from the blending means to the frame memory, same data are written in the frame memory and the local memory, a process of the rendering condition determination means which makes access to the local memory and a process of the texture processing means which makes access to the texture memory being executed in parallel with each other. Preferably, the information processing apparatus further comprises linear interpolation calculation means supplied by a host apparatus with data for a starting point of horizontally rendered pixels and with variations from the starting point, the linear interpolation calculation means calculating values for pixels to be rendered, on the basis of information supplied from the host apparatus, and supplying calculated values to the texture processing means and to the rendering condition determination means in a parallel manner. According to this aspect, a high-speed rendering can be achieved even in the case where the frame memory is embodied by a VRAM. The process in each stage can be performed without being affected by a access delay characteristic of the memory.
In another preferred embodiment, the information processing apparatus further comprises: first buffer means for temporarily storing results of a process in the rendering condition determination means; and second buffer means for temporarily storing results of a process in the texture processing means, the rendering condition determination means and the texture processing means executing respective processes in an asynchronous manner, the determination means and the texture processing means operating asynchronously with respect to each other while maintaining synchronism with the blending means so that data is properly processed in the blending means. According to this aspect, means that are operated parallel with each other can be operated asynchronously. Thereby, an effect of a delay occurring in one means on the process in another means can be minimized.
In another preferred embodiment, an access speed of the local memory, at least, is greater than an access speed of the frame memory. According to this aspect, it is possible to embody the frame memory by a VRAM, which is used in the existing system. Therefore, it is possible to achieve a high-speed rendering while the compatibility with the existing system is maintained.
In still another preferred embodiment, the rendering condition determination means, the texture processing means and the blending means constitute a rendering pipeline executing a pipeline process. According to this aspect, it is possible to carry out a high-speed pipeline process.
The aforementioned objects of the present invention can also be achieved by an information processing apparatus connectable to memory means for storing first information indirectly relating to generation of information for an image to be displayed, the information processing apparatus comprising a rendering pipeline subjecting the first information and second information directly relating to generation of information for an image to be displayed to a pipeline process, and supplying generated image information to the memory means, wherein the rendering pipeline is constructed of a total of n (=natural number) stages formed by alternately disposed process units and registers, the process unit having operating means responsible for operation of the second information as well as having interpretation means responsible for interpretation of the first information, and the register storing an output of the process unit. Preferably, the information processing apparatus further comprises selector means which is exclusively connected to a control line carrying a process content for each process unit in the n stages, and imports the second information from a host apparatus. Preferably, the information processing apparatus further comprises means for supplying, to the rendering pipeline, information that includes an information item that handles both the first information and the second information and a tag indicating whether the first information or the second information is carried, each process unit in the rendering pipeline detects the tag so as to determine whether to process supplied information using the operating means or using interpretation means. According these aspects, it is possible to modify the function of each process unit without stopping the operation of the rendering pipeline.
In a preferred embodiment, the information processing apparatus further comprises outputting means which, provided in a stage preceding the rendering pipeline, adds a terminal point tag indicating a terminal point is added to information relating to an terminal point of a polygon while reducing polygon information from a host apparatus into points, and outputs the second information; and a lock unit provided in the rendering pipeline in a stage thereof preceding a process unit that requires the first information from the memory means, the lock unit assuming the second information to be relating to the terminal point of the polygon, in case the terminal point tag added to the second information input is set ON, and then halting subsequent input of information until all information that remain in the rendering pipeline, including the second information, has been output from the rendering pipeline. Preferably, the outputting means has means outputting the terminal point tag only when a queuing process is necessary. Preferably, the lock unit has a lock mechanism halting input of information until all information that remain in the rendering pipeline has been output from the rendering pipeline, and means for activating the lock mechanism in response to the terminal point tag only when there is queuing process. According to these aspects, it is possible to operate the rendering pipeline without producing improper image information, even when the image information relates to an image having an overlapped portion.
In another preferred embodiment, the rendering pipeline has a first process unit which is used only as an address presenting unit for supplying an address to the memory means, a second process unit which is used as a data import unit for importing data from the memory means, and a plurality of pipeline registers absorbing a delay that corresponds to latency between the first and second process units. Preferably, the information processing apparatus further comprises means for reducing loss of time due to switching between a writing operation and a reading operation, by giving a preference to a request in a read queue while the memory means is being used in a reading mode so that the reading operation is executed in a continuous manner, and by giving a preference to a request in a write queue while the memory means is being used in a writing mode so that the writing operation is executed in a continuous manner. The memory means may be constructed of a synchronous memory. The memory means may comprise a first memory constructed of a synchronous memory and connected to an arbitration circuit and a second memory connected to display means, the rendering pipeline being enabled to read from and write to the first memory, the rendering pipeline being enabled to write to the second memory, and an access request from the display means being issued to the second memory. Preferably, the first memory has a first storage area storing main information, and a second storage area storing control information provided in one-to-one correspondence to the main information. Preferably, the rendering pipeline has an address presenting unit connected to the arbitration circuit and a data import unit, each, of the address presenting unit and data import unit includes means for caching the control information. Preferably, the address presenting unit includes means for latching information that indicates which address of the second storage area is subjected to caching, and wherein if the control information is already cached, an address in which the main information is stored is presented to the first memory, if the control information is not cached, or if non-cached control information having a address different from that of the cached control information is necessary, the address in which the non-cached control information is presented to the first memory, in case the control information is set to a first value, the data import unit transmits; data imported from the first memory to a unit in a subsequent stage in the rendering pipeline, and in case the control information is set to a second value, the data import unit transmits a predetermined value to a unit in a subsequent stage in the rendering pipeline. Preferably, the rendering pipeline has a process unit; built therein in a final stage and equipped with a caching function for caching the control information. According to these aspects, it is possible to operate the rendering pipeline at a high speed when a high-speed memory such as a synchronous memory is used.
The aforementioned objects of the present invention can also be achieved by an information processing method in an information processing apparatus connectable to a texture memory storing texture data provided to paste a pattern or the like to a three-dimensional image and including color data and an xcex1 value, to a frame memory storing color data for a three-dimensional image to be displayed, and to a local memory storing rendering data including a color data, an xcex1 value and a z value relating to a depth, as well as storing a microprogram and user data, the information processing method comprising the steps of: a) reading the texture data from the texture memory so as to paste a pattern to associated pixels; b) reading depth data or the like from the local memory so as to make a determination as to whether or not associated pixels should be rendered; and c) reading depth data or the like for pixels that are already rendered from the local memory so as to blend read data with color data for pixels to be rendered and to obtain data that should be finally written in the frame memory, wherein writing of data to the frame memory is enabled in step c) but reading of data is not, same data is written both in the frame memory and in the local memory, and step 2) effected by accessing the local memory and step 1) effected by accessing the texture memory are executed parallel with each other. According to this aspect, a high-speed rendering can be achieved even in the case where the frame memory is embodied by a VRAM. The process in each stage can be performed without being affected by a access delay characteristic of the memory.
The aforementioned objects of the present invention can also be achieved by an information processing method of an information processing apparatus connectable to memory means for storing first information indirectly relating to generation of information for an image to be displayed, the information processing method comprising a step of: a) subjecting the first information and second information directly relating to generation of information for an image to be displayed to a pipeline process, and supplying generated image information to the memory means, wherein step a) uses a rendering pipeline constructed of a total of n (=natural number) stages formed by alternately disposed process units and registers, the process unit having operating means responsible for operation of the second information as well as having interpretation means responsible for interpretation of the first information, and the register storing an output of the process unit. According this information processing method, it is possible to modify the function of each process unit without stopping the operation of the rendering pipeline.